Field of the Invention
The embodiments herein relate to processors and, more particularly, to a method for speculative execution of instructions.
Description of the Related Art
Many computing systems include processors that allow instructions to be executed in an order that is different from the original program order. This re-ordering of instructions may allow a newer instruction whose operands are ready to be executed ahead of an older instruction that is waiting for one of its operands to become ready. For example, an instruction to store data in a given memory location may require time to decode a virtual address for the given memory location into a physical address. Instead of waiting for the store instruction to execute, the processor may fetch the next instruction and begin its execution.
In some processing cores, however, load instructions cannot be executed until addresses of all store instructions in the pipeline have been determined. This is to ensure that the addresses targeted by all the older store instructions are known by the time the load instruction executes, at which point, the processor checks the target address for the load to determine whether data should be obtained from one of the older store instructions or from a memory. If a load instruction executes before an older store instruction with a same target address, then the processor will read invalid data.